The present invention relates to the field of semiconductor manufacturing, and more specifically to the manufacturing of bipolar junction transistors.
In a widely used layout for bipolar junction transistors, a base diffusion region is formed in a larger area of doped semiconductor that forms a collector region, and a smaller emitter region is formed within the base region at the surface of the semiconductor wafer. The majority of device current travels vertically through the base region between the emitter and collector regions. Electrical contacts to the base and collector are formed at lateral areas of the transistor.
In transistors of the above type used in high-voltage applications, a limiting factor is the transistor's “breakdown voltage”, which is the voltage at which uncontrolled amounts of current are conducted at reverse-biased junctions. One specific area at which breakdown occurs is at the portion of the base-collector junction adjacent to the surface of the semiconductor wafer, owing to high electric field gradients that typically exist at such points. If a transistor is to have a higher breakdown voltage so as to be safely usable at higher operating voltages, then steps must be taken to either reduce field gradients in this region or to somehow improve the region's ability to withstand high field gradients.
One technique that has been used to favorably shape the electric field in the surface region of the base-collector junction is to place a biased conductive element above this region, for example on top of an oxide or similar dielectric layer. Such an element is commonly referred to as a “field plate”. The bias charge on the field plate interacts with charge existing in nearby elements of the device (such as the areas of the base and collector immediately adjacent the base-collector junction) to reduce the field gradient in this surface junction area. As a result, the device can be operated safely at higher voltages than would otherwise be possible.
Another important aspect of the layout of bipolar junction transistors is the placing of contacts to the base and emitter, because these can affect the size of the device and therefore the cost of the device as well. In one current manufacturing technique, the emitter contact is made using a doped polysilicon element in contact with the emitter diffusion, while the base contact is made using a traditional “ohmic” connection with metal in contact with the base diffusion region. These different contacts are formed using separate masking steps. This requires that the contacts be sufficiently spaced to allow for mask alignment tolerance during manufacturing, contributing to overall device size. This problem is compounded when a traditional field plate requiring its own separate masking is employed.
It would be desirable to manufacture a bipolar junction transistor that exhibits high breakdown voltage while being as small as possible for a given manufacturing technology, thereby improving device performance and cost.